37th FCAL Hardware WG Meeting

Europe/Zurich
Description

please connect to Marek Idzik vidyo room or use the link: https://vidyoportal.cern.ch/flex.html?roomdirect.html&key=aIAFycf37Jnm

    • 16:00 16:15
      FLAME design status 15m
      Speaker: Marek Idzik (AGH University of Science and Technology)
    • 16:15 16:35
      Status of FPGA development at JINR 20m
      Speakers: Aleksandr Lapkin, Alexey Zhemchugov (Joint Institute for Nuclear Research (RU)), Mikhail Gostkin
    • 16:35 16:50
      Update on FLAME backend module prototype 15m
      Speakers: Bartosz Dziedzic, Leszek Zawiejski (Institute of Nuclear Physics PAN, Cracow , Poland)
    • 16:50 17:05
      Status of BeamCal readout design 15m
      Speakers: Angel Abusleme (Pontificia Universidad Catolica de Chile), Matias Henriquez
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