1) Demonstrator tests
The next round of the demonstrator tests is foreseen for the week starting on hte 18.5.09. Julien needs some time to prepare
the thermal insulation of the layer and to optimise the placement of the thermal drain, i.e. to apply the correct pressure onto the
thermal gel.
Initially, the tests will be pursued at LAL using the thermal insulation manufactured by Julien. If needed, the tests under vacuum
conditions can be performed on relatively short notice. The prepartion of the vaccum enclosure at LLR would not take more than
one day.
In general the whole set of tests performed in February will be repeated, first inside the thermal insulation and then finally with
the thermal slab inserted into the alveolar structure. The height if the new thermal drain+thermal gel (ca. 500 mum) seems to be uncritical.
2) VFE Electronics
Encouraging reply from manufacturers concerning relisation of FE-Boards. Priority will be given
to tests with FEV7_CIP (Packaged Chip) to demonstrate until middle of July the feasibility to realise the r/o electronics
and the subsequent DAQ chain. This chain will be realized with a current prototype of the DIF card.
For this setup Mark and Mickael will produce also one alveolar layer until beginning if June.
Using the FEV_COB (Chip on board, i.e. directly bonded) the final decision of the layout of the EUDET Module will
be taken until september 09 (i.e. the calice collab. meeting). To that date also a baseline construction schedule is to be worked out.
3) Next meetings
We have `agreed an EVO Meeting around the time of demonstrator tests. I propose the 19/5/09 1200h UTC, agenda to be announced.
There are minutes attached to this event.
Show them.
