30 May 2016 to 5 June 2016
Magdalena Palace
Europe/Zurich timezone

Readout electronics for tracking detectors

31 May 2016, 12:00
30m
Bringas (Palacio de la Magdalena)

Bringas

Palacio de la Magdalena

Speaker

Dr Oscar Alonso (University of Barcelona)

Description

Silicon micro-strips detectors are the baseline for the tracker region of the future International Linear Collider (ILC). Nevertheless, variations of this type of sensors like resistive micro-strips or more innovative detectors like Low Gain Avalanche Detectors (LGADs) have been presented as possible candidates thanks to some of their advantages, like 2-D positioning in the cases of the resistive micro-strips or a notable improvement of the signal to noise ratio in the case of LGADs [1]. In this paper, an ASIC fabricated in 180 nm CMOS technology from AMS with the very front-end electronics used to readout the signal from different sensors (micro-strips, resistive micro-strips, LGADs as well as inverse LGADs) is presented as well as its experimental results. The front-end has the typical architecture for Si-strip readout [2], i.e., preamplification stage with a Charge Sensitive Amplifier (CSA) followed by a CR-RC shaper. Both amplifiers are based on a folded cascade structure with a PMOS input transistor and the shaper only uses passive elements for the feedback stage. The CSA has programmable gain and a configurable input stage in order to adapt to the different strip flavours (resistive micro-strips, LGADs and inverse LGADs). The fabricated prototype is 0.865 mm x 0.965 mm and includes the biasing circuit for the CSA and the shaper, 4 analog channels (CSA+shaper) and programmable charge injection circuits included for testing purposes. Although the front-end can be used in different sensors, the design have been focused in optimizing it for resistive micro-strips. For this reason, a spice model of the resistive micro-strip detector developed by IFCA has been used at the design stage. Noise and power analysis performed during simulation fixed the size of the input transistor in W/L =960 um/0.2 um. The shaping time is fixed by design at 1 us and, in this ASIC version, the feedback elements of the shaper are passive, which means that the area of the shaper can be reduced using active elements in future versions. Finally, the different gains of the CSA have been selected to maintain an ENC below 400 electrons for a micro-strip detector with a capacitor of 20 pF, with a power consumption of 150 uW per channel. [1] G. Pellegrini et al., “Recent Technological Developments on LGAD and iLGAD Detectors for Tracking and Timing Applications”, Instrumentation and detectors, arXiv:1511.07175. [2] F. Anghinolfi et al., in: IEEE Transaction on nuclear science, vol. 49, nº 3, pp.1080-1085, 2002.

Presentation materials