Speaker
Akimasa Ishikawa
(KEK)
Description
Belle II ugpgrade is expected around 2028 to mitigate the high background induced by electron and positron beams. We have invented a new pixel detector concept named Dual Timer Pixel (DuTiP) for the vertex detector upgrade. This pixel detector concept can be also used for the layer 7 and 8 of the ILD vertex detector. The first prototype was fabricated with lapis semiconductor 200 nm FD-SOI technology and characterization is ongoing. We will present the status and prospects of the development.
Primary author
Akimasa Ishikawa
(KEK)